1. Field of the Invention
The present invention relates to a transfer pulse supplying circuit and a solid-state imaging apparatus. More particularly, the present invention relates to a transfer pulse supplying circuit that supplies vertical transfer pulses for use in driving a vertical transfer unit of a CCD (Charge Coupled Device) solid-state imaging apparatus, and a CCD solid-state imaging apparatus having the circuit.
2. Description of Related Art
In a CCD solid-state imaging apparatus, signal charge accumulated in each light-receiving element disposed in a light receiving portion is transferred to a vertical transfer unit, the signal charge transferred to the vertical transfer unit is transferred to a horizontal transfer unit, and the signal charge transferred to the horizontal transfer unit is transferred to an output circuit, thereby outputting the transferred signal charge. The output becomes image information. A period for one screen of a video device such as a display and a TV is referred to as “one frame”, and for example, in an interlace method, two fields form one frame. Image information of the one field or one frame is repeatedly outputted, so that an image is viewed by the video device as a still picture or a moving picture.
In such a device, when the signal charge is transferred by the horizontal transfer unit, the horizontal transfer unit is driven in a state where the operation of the vertical transfer unit is ceased to extract signal charge information of one horizontal line (e.g., refer to FIG. 3 of Japanese Unexamined Patent Application Publication No. 2000-138943).
Once the signal charge information of one horizontal line is extracted for all the horizontal lines, pixel information of one frame is transferred basically.
More specifically, as in a timing chart shown in FIG. 3, the vertical transfer in the vertical transfer unit is performed in a horizontal blanking period (period denoted by reference sign “b” in the figure) when a horizontal transfer pulse denoted by reference sign “Hck” in the figure is kept in a certain level (high level in the timing chart shown in FIG. 3) so that switching noise of vertical transfer pulses denoted by reference sign “Vφ (Vφ1 to Vφ6)” does not affect the vertical transfer in an effect pixel period (period denoted by reference sign “a” in the figure).
That is, there occur potential fluctuations of a substrate in which the CCD solid-state imaging apparatus is formed at a timing of falling the vertical transfer pulses (reference signs “T2, T4, T6, T8, T10 and T12” in the figure) and a timing of rising the vertical transfer pulse rise (reference signs “T1, T3, T5, T7, T9 and T11” in the figure). Accordingly, the vertical transfer is performed in the horizontal blanking period to prevent such a potential fluctuation from affecting the output from the output circuit.
In recent years, with the CCD solid-state imaging apparatus, market needs for high image quality have advanced increase in number of pixels. There has also been a growing need for capturing a large number of images at the same time in a short time. It is therefore desired to provide a CCD type solid-state imaging device having a large number of pixels and the same degree of frame rate as currently used frame rate.
As methods for achieving the same degree of frame rate as currently used frame rate in a high-pixel CCD solid-state imaging apparatus, (1) a method of increasing a drive frequency at which the CCD solid-state imaging apparatus is driven, and (2) a method of performing the vertical transfer within the effective pixel period, are considered.
However, if the same degree of frame rate as currently used frame rate is tried to be achieved by increasing the drive frequency at which the CCD solid-state imaging apparatus is driven, an increase in heating value, increase in power consumption, increase in price of the substrate in which the CCD solid-state imaging apparatus is formed, increase in number of peripheral units, and the like, which are attributed to the increased drive frequency, are brought about. Thus, it is hard to say that the method of increasing the drive frequency at which the CCD solid-state imaging apparatus is driven to thereby achieve the same degree of frame rate as currently used frame rate is appropriate. Furthermore, the countermeasure of only the increase in the drive frequency to the recent demand for improving the frame rate has almost reached a limit.
On the other hand, if the same degree of frame rate as currently used frame rate is tried to be achieved by performing the vertical transfer within the effective pixel period, the effects of switching noise of the vertical transfer pulses are suffered, as described above. More specifically, at the rise timing of each of the vertical transfer pulses, and at the fall timing of each of the vertical transfer pulses, there occur potential fluctuations of the substrate in which the CCD solid-state imaging apparatus is formed, affecting the output from the output circuit, which causes fixed pattern noise (FPN).
More specifically, as in a timing chart shown in FIG. 4, when the vertical transfer is performed in the effective pixel period (period denoted by reference sign “a” in the figure), at T1 which is rise timing of the vertical transfer pulse denoted by reference sign Vφ6, T2 which is fall timing of the vertical transfer pulse denoted by reference sign Vφ2, T3 which is rise timing of the vertical transfer pulse denoted by reference sign Vφ1, T4 which is fall timing of the vertical transfer pulse denoted by reference sign Vφ3, T5 which is rise timing of the vertical transfer pulse denoted by reference sign Vφ2, T6 which is fall timing of the vertical transfer pulse denoted by reference sign Vφ4, T7 which is rise timing of the vertical transfer pulse denoted by reference sign Vφ3, T8 which is fall timing of the vertical transfer pulse denoted by reference sign Vφ5, T9 which is fall timing of the vertical transfer pulse denoted by reference sign Vφ4, T10 which is fall timing of the vertical transfer pulse denoted by reference sign Vφ6, T11 which is rise timing of the vertical transfer pulse denoted by reference sign Vφ5, and T12 which is fall timing of the vertical transfer pulse denoted by reference sign Vφ1, there occur potential fluctuations of the substrate in which the CCD solid-state imaging apparatus is formed, and these potential fluctuations cause FPN at the respective change times T1 to T12.
FPN of each horizontal line caused at the respective change times T1 to T12 is coupled longitudinally, which will appear as longitudinally linear image noise.
Considering noise at one point on a screen between frames or between fields with the same mechanism, since image noise occurs at the same position constantly between the frames or between the fields, the certain point on the screen is constantly noise (dark or light). The noise will be point-like noise staying on the screen independently of the occurrence of the longitudinal linear image noise.
Although these two are phenomena independent from each other, in the generating mechanism, FPN and the continuity (with the linear noise, the continuity in the vertical transfer period, and with the point-like noise, the continuity between the frames or between the fields) are the same, and thus, the linear noise will constantly appear on the screen if they occur simultaneously.
As means for solving the above-described problem, there is suggested a drive method in which the vertical transfer of the signal charge is performed in the horizontal effective scanning period, and during the vertical transfer, the vertical transfer unit is supplied a drive clock waveform of a rise and fall gradient with a transient speed ΔV/ΔT at which crosstalk noise caused at the rise and fall of the drive clock waveform can be eliminated in a correlative double sampling circuit (e.g., refer to Japanese Unexamined Patent Application Publication No. 2005-269060 (hereinafter referred to as “Patent Document 2”). The drive method allows a high frame rate of the solid-state imaging apparatus to be realized.
However, since the employment of only the drive method described in Patent Document 2 does not suppress the crosstalk within the CCD solid-state imaging apparatus sufficiently, a method for further suppressing the crosstalk is employed in which when the vertical transfer is performed, instead of employing a sequential transfer method (refer to FIG. 5A), a vertical transfer method (complementary transfer method, refer to FIG. 5B) of changing the vertical transfer pulses in a reverse phase to each other simultaneously such that when one vertical transfer pulse becomes a high level, another vertical transfer pulse simultaneously becomes a low level is employed to cancel out the effects by the vertical transfer pulses.